1. Field of the Invention
The present invention generally relates to a low frequency analog circuit and a design method thereof, and more particularly, to a method of operating at least one MOS transistor of a circuit in a weak inversion region and a low frequency analog circuit thereof.
2. Description of Related Art
Low frequency analog circuits which are normally operated under a frequency of 1 MHz are often used for amplifying signals, e.g., a post-amplifier of a microphone. Conventional low frequency analog circuits are often fabricated as integrated circuit (IC) chips, and MOS transistors of the ICs are often designed for operating in strong inversion regions thereof, e.g., an NMOS (N-type metal-oxide-semiconductor) transistor operating under a condition of “Vgs−Vth>0” for regular operation of the circuit. However, in this manner, performance of the circuit is also limited by the specific condition. For example, a current flowing through an NMOS transistor operating under this condition at a saturation status can be defined as equation (1), that is:ID=(1/2)μnCox(Vgs−Vth)2  (1)
wherein μn represents an electron mobility; Cox represents an oxidation capacitance; Vgs represents a voltage between a gate electrode and a source electrode of the transistor, and Vth represents a threshold voltage of the transistor. Therefore, transconductance (2) can be obtained as indicated below.
                                          g            m                    =                                    2              ⁢                              K                ⁡                                  (                                      W                    /                    L                                    )                                            ⁢                              I                D                                                    ,                            (        2        )            wherein W/L represents an aspect ratio on the MOS transistor, in which W and L represent a width and a length of the MOS transistor respectively. It can be known from the equation (2) that the transconductance gm is related to the current. When the current is greater the transconductance is also greater. However, in further considering a general noise equivalent equation, e.g., equation (3):Vi2/Δf=(8/3)kT(1/gm)+Kf/WLCoxf  (3)wherein f represents frequency, it can be concluded that the greater the transconductance is, the lower the noise would be, which is also known as a higher signal noise ratio (SNR). As such, efforts towards higher SNR and lower power consumption in designing a low frequency analog circuit chip are contradicted to each other.